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lizby
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Posted: 11:59am 07 Aug 2026

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tldr: Claude and ChatGPT can run Kicad internally to themselves and iterate to produce netlists, eliminate DRC errors, place, and route, and generate gerbers. But with presently limited scope, and not helped by my limited ability to provide guidance

This is a week-long journey now, and I had no idea where I'd end up.

I started with a solar thought experiment with Gemini for Cuba (having run similar ones for Pakistan, African agricultural solarpunk, the Philippines, and Australia). What would it take to make Cuban residences largely independent of the failing grid? The Cuban situation is somewhat unique: grid is approximately 1950s U.S.era design--nominally 240V split phase with 2 120V legs, typically no more than 60A service. Many Cuban residences have only a single 120V leg and service as low as 30A. Since the beginning of July, the grid has had at least 4 systemic multi-day blackouts, and households are used to local blackouts of 18 hours a day or more.

Gemini's conclusion: 2-6kW of panels (ground-mounted), 3-12kWh of batteries, and a 3.5-4kW single phase 120V inverter/charger could provide 9-20+kWh daily for potentially a little more than $1,000. The sticking point is the inverter/charger--it's a fairly unique design which needs to be very competitively priced. Gemini estimated a Chinese manufacturer would need an order of 10,000 or more to make a custom design.

I asked Gemini if it could make the design. It cheerfully answered, "Yes". So it came up with a verbal spec. I asked it to make a Kicad netlist (I've used EasyCAD and EasyEDA, but not Kicad). It produced the .net file. I imported it into Kicad, got a bunch of errors, passed those back to Gemini, got a new .net file and repeated. It was going to be a slow process with me in the middle.

About then I got a message from Anthropic giving me a $100 credit to use with Fable 5. My first thought was that I wouldn't know how to use it since Opus 4.8 has been entirely satisfactory for talking directly to the hardware (Pico Computer 3 or any PicoMite 2 W or Dockstar running OpenWrt) and producing the programs I ask it to--vibe coding to the max. My second thought was, maybe Fable can do this PCB design. So I set it to the task, with me still in the middle. After a few turn, it said something which made me ask it if it was able to run Kicad internally. It said probably, if I downloaded to the the Linux AppImage version which matched my own. I found kicad-10.0.5-x86_64.AppImage.tar, downloaded it, and Claude confirmed that it could iteratively work through import and then DRC errors until it could give me an error free .net file. I asked it to go further and produce a .kicad_pcb file from which I could produce gerbers to send to JLCPCB. Gemini suggested a placement layout, and Claude gave me the unrouted .kicad_pcb file which I double-clicked on and it brought up the PCB with ratlines. I could see that one component with long ratlines would be better placed elsewhere, so I suggested that placement to Claude and it came back with a much better-looking layout.

I then asked it to do the routing. It talked to itself for a long time. Finally it had a file for me to double-click on. Everything looked routed, but the diagonal traces were stairsteps. I went back to Claude, and it fixed it

Pretty nice looking, I thought, but what do I know? So I fed the design to ChatGPT and it came back immediately and said, "Won't work. It's a buck design and you can't buck 48V DC to 120V AC--you need to boost it first." So I asked Chat if it could run Kicad internally with the AppImage. I gave it the tar file, and it said it tested out. I asked it to look at Solar Mike's Multi Phase PV Charger. Mike didn't include design files, but has many images of schematics and PCBs. I saved the browser page, which include a folder of images, and uploaded it to Gemini (which is perhaps the best AI with images). It figured out a .net file and recommended some parts changes--200V IXTP120N20X4 mosfet, FAN7382 gate drivers, unidirectional ACS770ECB-200B current sensor, MUR120 diodes. Gemini said it can't run the Kicad AppImage, so I asked it to produce a handoff document for Claude.

So Claude started work on it and finally produced a .kicad_pcb file, which it said was strictly a prototype for bench testing, and needed to have copper bus bars bolted on as Mike's design did. I produced gerbers and sent them to JLCPCB--$15USD for 5 boards. But again, what do I know? I'll have to use entirely new-to-me protocols in testing this relatively hig-voltage design (I've not previously worked with more than 24V). And the inductor is off-board.

Anyway, at this point, I had $.31 remaining of the $100 credit for using Fable, so I asked it to produce a How-To document. I switched back to Opus 4.8 and asked Claude to produce the Pico 2 W controller board for this MPPT PCB--communicating through the 2x10 header. That was yesterday evening. After several "What up?" prompts after long periods with no output, it says it's still working on routing. Apparently it has to figure out a different toolchain from what Fable was using.

Claude did eventually route a controller board based on the Pico 2 W with an ADS1115 ADC module. It's not a very complicated board, and it worked on it for hours, routing and rerouting, with occasional prompts from me to wake it up.

Apparently there are a lot of command-line helper programs which people have developed to work with Kicad, and Claude and ChatGPT are experimenting with them. For instance, there's a routing tool, FreeRouting, (which seems so far not to be working entirely).

So that's progress to this point. At the very least, getting a clean .net file is a very big timesaver. Whether or not this whole end-to-end vibe PCB design works well right now, I suspect it will in 6 months. I've learned a fair amount about Kicad (though I haven't actually placed a part or drawn a trace yet).

Thanks to Solar Mike for his designs. I've been watching since he was using PICAXE MCUs. And to other shedders in the "Electronics" forum

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Solar Mike
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Joined: 08/02/2015
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Posted: 12:09pm 07 Aug 2026

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Cool, interested to see how you get on.
I do all my designs in DipTrace, it can export out in various other formats, although have never used that functionality, happy to do that for you, send me a PM and I can see what I can or cannot do.

Cheers
Mike

matherp
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Joined: 11/12/2012
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Posted: 12:10pm 07 Aug 2026

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I haven't tried using them to design, but I have used Claude to do a design review. I passed it the gerbers, schematic and easyeda design file. It took some time but found a complex issue on the design, made other less important suggestions and validated the basic design overall. It went out for the chip datasheets and all other documentation it needed itself - pretty impressive stuff

PhenixRising
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Joined: 07/11/2023
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Posted: 05:16pm 07 Aug 2026

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I keep seeing ads for Flux.ai

lizby
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Joined: 17/05/2016
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Posted: 10:58pm 05 Sep 2026

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Prompt to Claude: "Please provide a link to and summarize OpenAI's recent introduction of the Astra GPT-6 model with respect to its ability to design PCBs using Kicad."

Response:

Quote It's real, and it launched two days ago. The primary source is OpenAI's announcement page: https://openai.com/index/gpt-6-astra/

The KiCad item is one of the demo videos: a 15-second condensed playback of Astra performing PCB layout, taking an electronic schematic and turning it into a manufacturable board by placing components and routing copper connections. Forbes notes the actual run was listed at 2 minutes 54 seconds. The framing is that layout is still done by hand and is a common source of delay, so speeding it up frees engineers to design and test more.

The important context is that this is filed under computer use, not EDA. Astra is positioned as a computer-operating model, with the demo set extending from browsers and spreadsheets into professional applications including Power BI, KiCad, and FreeCAD — plus modelling a house in Blender and walking it in Unreal Engine 5. So it's a model driving the GUI like a person would, not a model emitting design files.

What I'd want before getting excited, and what isn't in the release:

There's no PCB benchmark. Astra has numbers for FrontierMath, ARC-AGI-3, and ExploitBench, but the layout claim rests on one video. No layer count, no part count, no DRC report, no impedance or stackup discussion, and no indication the board was ever fabbed and brought up. "Manufacturable" is doing a lot of work in that sentence. One reply under the demo clip on X was simply that the design was terrible.

The architecture choice is also odd from where you sit. Puppeting the KiCad canvas is the visually legible option, not the sound one — .kicad_pcb is a text S-expression file and KiCad has a Python API, so generating and validating the file directly is both more reliable and checkable, which is more or less the premise of your easyeda_gen.py. A model good at layout should be writing the file, not pushing the mouse.

And autorouting isn't the frontier anyway. Freerouting has been shoving traces around for years. The hard parts are placement, return-current paths, thermal, creepage on anything mains-adjacent, and knowing which constraint to violate when they conflict — judgment that a 15-second timelapse is structurally unable to demonstrate.

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Mixtel90

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Joined: 05/10/2019
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Posted: 07:04am 06 Sep 2026

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Quote The hard parts are placement, return-current paths, thermal, creepage on anything mains-adjacent, and knowing which constraint to violate when they conflict

I couldn't have put it better myself. Get the placement right and you are a long way there. Return current paths can be a pig.

Mick

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lizby
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Posted: 03:38pm 10 Sep 2026

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So under my monthly subscription, Astra is not available in Chat in the browser; I found that it was being rolled out in codex, so I updated to the latest version, and there it was. I picked the "max" level, next highest below "multiple agents".

I had been thinking about a simple design to switch power from a 12V 100Ah LiFeP04 battery to my 300W Litheli B300 power station--something the manual says can be done to provide 100W charging gated through a p-ch mosfet controlled by an ESP32 S2Mini. I had already asked browser Chat to provide a netlist, so I also asked it to provide the prompt for codex:

Quote I want to use this as a small KiCad proof-of-concept project.

The netlist/specification is here:

C:\dl\micromite\_picomite\_claco\chat\pcbs\esp32_s2mini_highside_switch_netlist.txt

Please read that file first and treat it as the electrical source of truth.

Goal:
Create a complete, editable KiCad project for the very simple ESP32-S2 Mini plug-on high-side switch board described in the netlist.

Important constraints:

1. This is deliberately a SIMPLE board.
- One IRF4905PBF P-channel power MOSFET.
- One 2N7002 small MOSFET as the gate driver.
- One ESP32-S2 Mini GPIO output as specified in the netlist.
- Do not add unnecessary parts or redesign the circuit unless you find an actual electrical problem.

2. The PCB should plug onto ONE ROW of the ESP32-S2 Mini header pins specified in the netlist:
VBUS, GND, GPIO16, GPIO18, GPIO33, GPIO35, GPIO37, GPIO39.
Only the pins actually needed electrically need traces, but the physical header should mate correctly with that row.

3. The board is intended to switch an external 12 V or 24 V DC load using the IRF4905PBF as the high-side MOSFET.

4. Provide robust through-hole power connections for:
- unswitched +12/24 V input
- switched +12/24 V output
- power ground if required by the netlist
These are intended for ring terminals or wires retained with small bolts and nuts, not tiny PCB terminal blocks.
If the netlist does not specify bolt/hole size, pause and tell me what size you recommend before committing the footprint. Do not silently invent it.

5. Use appropriately wide copper for the switched-power path. This is not a high-current inverter board, but I want the power path visibly substantial and conservative.

6. Keep low-voltage ESP32 signal routing well separated from the 12/24 V power path where practical.

7. Put the IRF4905PBF where it has reasonable copper area for heat spreading and physical access.

8. Clearly label the PCB silkscreen:
VIN+
VOUT+
GND
ESP32-S2 MINI orientation
and any useful polarity/orientation markings.

9. First verify the ESP32-S2 Mini pin spacing and footprint orientation before laying out the board. Do not assume an arbitrary generic header footprint if it would place the board incorrectly.

10. Before making the final PCB, inspect the circuit for:
- correct IRF4905PBF source/drain orientation
- safe gate-source voltage at both 12 V and 24 V input
- correct 2N7002 pinout
- appropriate pull-up/pull-down/gate resistor values
- ESP32 GPIO safety
Report any concern before changing the circuit.

Workflow:
A. Read and summarize the netlist.
B. Check the electrical design and footprints.
C. Create the KiCad schematic.
D. Assign footprints.
E. Create and route the PCB.
F. Run ERC/DRC.
G. Show me a concise report of:
- files created
- board dimensions
- power-hole sizes
- track widths
- ERC/DRC results
- any assumptions you had to make.

Keep everything for this project in:

C:\dl\micromite\_picomite\_claco\chat\pcbs\

Do not modify unrelated files.

You have permission to inspect the local KiCad installation and use its command-line/tools as needed. Work directly on the project rather than merely telling me how I could do it.

Codex confirmed the netlist and availability of the Kicad tools, and started in. It ran out of tokens and I had to wait several hours to restart. It ran out of tokens again in the middle of the night. When I started again the next morning, it finished in about 15 minutes. This is what it produced:

I said, Ok, but if there are copper lugs on GND and VIN, there will be no room to put one on SW_OUT. So it started again and produce the 3 positions for large lugs along the bottom. I said, Ok, but I don't really need to be able to switch 24V and 30A (as I had originally specified) for this particular use, so please do again with 5.08mm screw terminals on the right, in order from the top of SW_OUT, GND, GND, VIN. Once again it ran out of its 5-hour timeslot token budget, and I asked it to continue. This is what it produced:

I don't like its right-angle traces, but probably could have fixed that with another turn. I sent the gerbers to JLCPCB. I did not ask for 2oz copper (which would add $43), but plan to solder 14AWG wire between the mosfet pins and the screw terminal pins, and then between the GND pins. Since my last order a month or so ago, JLC has more than doubled both the base price and the shipping price, so I paid $10.38 for 5 boards. Still not bad, I think. If I actually needed lots of these boards they could be ganged 2x2 to cut the price to 50 cents per board.

I did almost nothing here except to describe to browser Chat what I wanted and then pass it along to codex. It's a long way from Peter's or Mick's skill level, but 3 months ago it couldn't do this. It may be fine now for modest hobby use. It uses lots of tokens, but I don't really care so long as I don't hit a hard monthly limit, which I probably don't since I don't do that many boards.

~
Edited 2026-09-11 01:41 by lizby

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Mixtel90

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Posted: 04:07pm 10 Sep 2026

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Perhaps a simple additional instruction that traces must not contain bends sharper than 45 degrees might be enough. It does seem to make some odd layout decisions though. :)

Mick

Zilog Inside! nascom.info for Nascom & Gemini

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